ELECTRONIC DEVICE AND CONTROLLING METHOD THEREOF

Smart overview of the Invention

The patent application discusses an electronic device designed to enhance the efficiency of neural network model operations, particularly focusing on nonlinear activation functions. This device features a processor capable of accelerating these operations and a memory that stores instructions for processing. The key innovation lies in dividing input values into sections and using lookup tables (LUTs) to process these as integer operations, thereby improving accuracy and efficiency.

Background

Neural network accelerators are increasingly important for efficiently handling complex operations in neural networks. These operations often involve both linear and nonlinear activation functions, with nonlinear functions being more computationally intensive. Traditional methods like polynomial approximation can reduce accuracy, necessitating retraining of models. The use of LUTs is another approach, but it too faces challenges in maintaining accuracy across various functions and input ranges.

Technical Solution

The proposed solution involves an electronic device that processes nonlinear activation functions by identifying input value ranges for each layer in the neural network. These ranges are divided into multiple sections, each associated with a first LUT containing integer input and output values. This approach allows the nonlinear operations to be processed as integer operations, enhancing efficiency. Additionally, the device can dynamically adjust section sizes based on error thresholds to maintain accuracy.

Methodology

• Identify input value ranges for each neural network layer.
• Divide these ranges into multiple sections with predetermined sizes.
• Use a first LUT to map integer input values to output values for each section.
• Adjust section sizes and create detailed sections if errors exceed thresholds, using a second LUT for finer granularity.

Quantization and Interpolation

The method includes quantizing input data into sixteen bits, with LUT values quantized into eight and four bits for different levels of detail. The device performs linear interpolation between integer output values to derive real number outputs, ensuring precision across varying input conditions. This quantization strategy enhances computational efficiency while maintaining the accuracy of neural network model operations.